Regviz

NXP Semiconductors /MIMXRT1021 /SystemControl /ID_DFR0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ID_DFR0

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1021/SystemControl/ID_DFR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DEBUGMODEL_0)DEBUGMODEL

DEBUGMODEL=DEBUGMODEL_0

Description

Debug Feature Register

Fields

DEBUGMODEL

Support for memory-mapped debug model for M profile processors

0 (DEBUGMODEL_0): Not supported

1 (DEBUGMODEL_1): Support for M profile Debug architecture, with memory-mapped access.

Links

()

Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data